- Sixteen E1/T1 line interfaces
- Four E3/T3 line interfaces
- Sixteen LVDS (TIA644 standard) or RS422 differential inputs/output (input or output in groups of four)
- Large Xilinx FPGA provided by EDT PCIe8 LX mainboard
- Two large synchronous static memory banks or one memory bank up to 1 GB (also provided by mainboard – see details below)
- LVDS External clock that can be used to synchronize the output data
- Sixteen independent DMA channels to host memory
- Fast transfers using a 66 MHz 32-bit PCI
- Telecommunications network monitoring
- Telecommunications switching
|PCI/PCIe bus compliance, related to mainboard; see specifications for the main board you are using.
||High-density 68-pin AMP™ connector (part number 787169-7)
High-density 15-pin AMP™ receptacle (part number 748390-5)
|User Interface Xilinx
||PCI SS: Xilinx XCV1000E or optional XCV600E, XCV2000E
PCI GS: Xilinx XC2VP50 or optional XC2VP70
User definable LED
Debug connector, 20-pin .100″ x .100″ square pins, two rows
||PCI SS: Two 256K x 36-bit word synchronous static RAM or optional no RAM, 512K x 36-bit word RAM, or 1M x 36-bit word RAM
PCI GS: 1M x 36-bit word synchronous static RAM or optional 2M x 36-bit word RAM (with XC2VP70)
||PCI GS: 200-pin SODIMM socket for optional DDR memory module. Up to 1 gigabyte.
- Sixteen differential LVDS or RS422 signals – input or output in groups of four
- Standard ECL signal levels, terminated through 50 ohms to -2V
- Transformer coupled
- Four independent E3/T3 interfaces
- Jumpers select input/output or both on eight differential connector pins
- 75-ohm coaxial cable over 1100 feet at speeds up to 51.84 MB per second
- Compliant with ANSI T1.102-1993, Telcordia GR-499-CORE and G.823 for jitter tolerance
- B3ZS or HDB3 encoder/decoder
- Sixteen independent input/output E1/T1 interfaces
- Jumpers select input/output or both on sixteen differential connector pins
- 1.544 MB per second (T1), 2.048 MB per second (E1)
- Waveforms meet G.703 and T1.102 specifications
- Exceeds transmit return loss specification ETSI ETS-300166
- Jitter attenuation
- Transmit return loss exceeds ETSI ETS 300166
- HDB3 or B8Zs encoder/decoder
- Analog/Digital and remote loopback
Number of Slots
4.2" x 6.6"
|Operating: 0 to 44 °C
Non-operating: -40 to 70 °C
Heat Output: TBD
||Operating: 1% to 90% non-condensing at 40° C
Non-operating: 95% non-condensing at 45° C
||2 amps at 5V
Device drivers for Windows™ and Linux are included with the purchase of the Combo 2. Contact us about other operating systems.
EDT provides several levels of customer support, from phone consultation to custom design of hardware, firmware, or software, at hourly rates. Technical support is also provided through the Support section of the EDT web site.
Technisys, Inc. provides a family of interface panels designed to provide an easy and economical method of interfacing to the EDT Combo 2 and other EDT products. See their website, www.tsys-inc.com.
Ordering options are listed below. Be sure to specify which cable will be needed (if any).
Mezzanine board options
Combo 2 with…
Signal option: LVDS or RS422
PCIe8 LX / FX / SX main board – for options, contact Parhelia B.V.