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EDT LVDS/RS422 LVDS or RS422 interface

EDT LVDS/RS422 LVDS or RS422 interface


  • 33 LVDS or RS422 input/output signals
  • Transfer rates up to 90 megabits per second using a single channel; 64 megabits per second using all 16 channels
  • Provides 16 high-speed DMA channels between LVDS or RS422 devices and a PCI computer
  • User-programmable FPGA up to Xilinx XCV2000E (PCI SS) or XC2VP70 (PCI GS)
  • Local memory up to 1 gigabyte (PCI GS)
  • Single short PCI local bus slot
  • Fast transfers using a 66 MHz 32-bit PCI
  • Configuration file for 16 synchronous serial channels
  • Telemetry receiver or transmitter
  • Monitoring serial data communications
  • Satellite ground station support

The LVDS/RS422 is a mezzanine board for the PCI GS mainboard and provides 33 differential LVDS or RS422 signals. The signals can be inputs or outputs in groups of four signals (two channels). The function of each signal is determined by the FPGA configuration file used on the main board.

The main board is supplied with FPGA configuration files that implement 16 synchronous serial channels. Each channel inputs or outputs a data signal on the edge of the associated clock. The data is stored in or sent from host memory using the main board's PCI DMA. This configuration provides a simple, flexible solution for telemetry, satellite, and monitoring applications.

This board is an alternative to the newer LVDS-E / RS422-E mezzanine board, which can also work with the PCIe8 LX main board, has an option for E1/T1, and provides the possibility of switching between ECL, LVDS, and RS-422 versions of the board with no programmatic differences in your application. There are some minor programmatic differences between the -E and non -E versions, however, so care should be taken when re-ordering to ensure compatibility with existing applications.

When ordering, specify which main board PCI SS (obsolete) or PCI GS and signal levels (LVDS or RS-422).

Datasheet LVDS / RS422 Mezzanine

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